DOI: 10.5593/SGEM2014/B21/S7.037


P. Kustarev, S. Bikovsky, A. Antonov, R. analov
Wednesday 1 October 2014 by Libadmin2014

References: 14th International Multidisciplinary Scientific GeoConference SGEM 2014, www.sgem.org, SGEM2014 Conference Proceedings, ISBN 978-619-7105-10-0 / ISSN 1314-2704, June 19-25, 2014, Book 2, Vol. 1, 287-294 pp

Nowadays “Systems on Chip” (SoCs) have become one of the main types of computer platforms. SoC design is based on parallel computing models, which map on architectures with primarily hardware implementation of computational process components. In the article, we propose the original architecture, based on modified model of Kahn process networks. The model of hardware-detached process interaction is described, as well as corresponding mechanism of inter-process communication channel management. In conclusion, we consider several hardware implementation patterns of proposed model elements. Proposition and estimations presented are proved by SoC design experience and results of several applied projects, completed by the authors.

Keywords: embedded systems, SoC, hardware-intensive, scheduling, process synchronization

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